Product Brief

The RadPC Hydra Single-Board Computer provides radiation-tolerant computing for small satellites. The RadPC SBC implements a set of redundant computing cores on a commercial Field Programmable Array (FPGA) and deploys a series of patented recovery algorithms to automatically detect, recover, and repair faults caused by single event effects (SEEs). The recovery procedures are abstracted from the user allowing the software developer to treat the RadPC SBC as a traditional embedded computer without worrying about SEEs. The RadPC CPU implements a 32-bit RISC-V computing architecture, which is the new standard for space computing.  This allows RadPC to use the open-source RISC-V development tools with custom plug-ins to adapt it for the fault-tolerant RadPC architecture. 

The RadPC-SBC-100 version is optimized for small spacecraft applications by providing low power consumption and increased computation relative to other commercially available SmallSat computers. The RadPC computer is implemented on an industrial-grade Xilinx Artix-7 200T FPGA with an operating temperature of -40C to +100C. This commercial off-the-shelf FPGA is fabricated using a 28nm process node. This reduced feature size provides inherent immunity to total ionizing dose (TID) with a predicated rating exceeding 50krad. Reliability models show the RadPC architecture implemented on an Artix-7 FPGA provides a significant improvement to the Mean Time Before Failure (MTBF) over a simplex system, a system using triple modular redundancy (TMR), and a system using TMR+repair.

The RadPC SBC has a long history of flight heritage including multiple satellites in LEO and a demonstration in transit to and on the surface of the moon as part of the Firefly Aerospace Blue Ghost Mission 1 lunar lander mission in 2025.